PD17012_15 Datasheet, PDF (78/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
10.2.1 General-purpose port data register (port register)
A port register sets the output data and reads the input data of the corresponding general-purpose port.
Because the port registers are mapped in the data memory, they can be manipulated by any data memory
manipulation instruction.
Figure 10-2 shows the relationship between a port register and the corresponding port pins.
By setting data to the port register corresponding to the port pins set in the general-purpose output port mode,
the output of each pin is set.
By reading the contents of the port register corresponding to the port pins set in the general-purpose input
port mode, the input status of each pin is detected.
Table 10-2 shows the relationship between each port (each pin) and port register.
Figure 10-2. Relationship Between Port Register and Pins
P
3
P
2
P
1
P
0
Port register
Bank
n
Address
m
Bit
b3 b2 b1 b0
Bit significance of port register
Address of port register (e.g., 70H = A, 71H = B, 72H = C, 73H = D)
Bank of port register
“ P ” of Port
Reserved words are defined for the port registers by the assembler.
Because these reserved words are defined in flag (bit) units, the assembler-embedded macro instructions
can be used.
Note that data memory type reserved words are not defined for the port registers.
P2E to P2H are multiplexed with LCD segment signal output pins. The port registers of P2E to P2H are also
multiplexed with LCD segment registers.
Because the LCD segment registers are also mapped in the data memory, they can be treated in the same
manner as the port registers.
10.2.2 Port YA (PYA) group register
The port YA (PYA) group register sets the output data of PYA. Port YA functions alternately as the key source
signal output pin. Therefore, the PYA group register is also used as the key source data register and is allocated
to address 42H of the peripheral addresses. For details, refer to 10.6.7.
10.2.3 General-purpose I/O ports (P0A, P0B, P1A, and P1D)
P0A, P0B, P1A, and P1D can be set in the input or output mode by the port 0A bit I/O select register (RF
address 37H), port 0B bit I/O select register (RF address 36H), port 1A bit I/O select register (RF address 35H),
and port 1D group I/O select register (RF address 27H), respectively.
The input/output data of the P0A, P0B, P1A, and P1D are set by port registers P0A (address 70H of BANK0),
P0B (address 71H of BANK0), P1A (address 70H of BANK1), and P1D (address 73H of BANK1), respectively.
Refer to Table 10-2.
For details, refer to 10.3.
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Data Sheet U10101EJ4V0DS