PD17012_15 Datasheet, PDF (119/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
12.2.3 Flip-flop and BTM0CY flag
The flip-flop is set at fixed intervals and its status is detected by the BTM0CY flag of the basic timer 0 carry
FF judge register.
When the BTM0CY flag reads out its contents to the window register by PEEK instruction execution, it is reset
to 0 (Read & Reset).
The BTM0CY flag is 0 at power-on reset, and is 1 at CE reset and on execution of the clock stop instruction.
Therefore, this flag can be used to detect a power failure.
The BTM0CY flag is not set after power application until an instruction that reads it is executed. Once the
read instruction has been executed, the flag is set at fixed intervals.
Figure 12-4 shows the configuration of the basic timer 0 carry FF judge register.
Figure 12-4. Configuration of Basic Timer 0 Carry FF Judge Register
Name
Flag symbol
b3 b2 b1 b0
Basic timer 0 carry FF judge
register
00 0B
T
M
0
C
Y
Address
17H
Read/
write
R & Reset
0 Flip-flop is not set
1 Flip-flop is set
Detects status of flip-flop
Fixed to 0
Power-on
Clock stop
CE
0000
1
1
Data Sheet U10101EJ4V0DS
117