PD17012_15 Datasheet, PDF (72/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
9.2 Data Buffer
9.2.1 Configuration of data buffer
Figure 9-2 shows the configuration of the data buffer.
As shown in the figure, the data buffer consists of a total of 16 bits at addresses 0CH to 0FH of BANK 0 on
the data memory.
The 16-bit data consists of bit b3 at address 0CH as the MSB and bit b0 at address 0FH as the LSB.
Because the data buffer is located in the data memory, it can be manipulated by all data memory manipulation
instructions.
Figure 9-2. Configuration of Data Buffer
Column address
0 1 2 3 4 5 6 7 8 9 ABCDEF
0
Data buffer
1
(DBF)
2
3
4
Data memory
5
6
BANK0
7
BANK1
7
BANK2
7
System register
Data memory
Address
0CH
0DH
0EH
0FH
Bit
Bit
Signal
b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
DBF3
DBF2
DBF1
DBF0
Data buffer
M
L
Data
S
S
B
Data
B
70
Data Sheet U10101EJ4V0DS