PD17012_15 Datasheet, PDF (17/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
13.6 Using A/D Converter .......................................................................................................... 151
13.7 Status on Reset .................................................................................................................. 156
14. D/A CONVERTER (DAC) ............................................................................................................... 157
14.1 Configuration of D/A Converter ........................................................................................ 157
14.2 Functional Outline of D/A Converter ................................................................................ 157
14.3 Output Select Blocks ......................................................................................................... 158
14.4 Duty Setting Blocks and Clock Generation Block .......................................................... 160
14.5 Cautions on Using D/A Converter .................................................................................... 163
14.6 Status on Reset .................................................................................................................. 164
15. SERIAL INTERFACE ..................................................................................................................... 165
15.1 Configuration of Serial Interface ...................................................................................... 166
15.2 Functional Outline of Serial Interface .............................................................................. 167
15.3 Shift Clock and Serial Data I/O Pin Control Blocks ........................................................ 168
15.4 Clock Generation Block .................................................................................................... 170
15.5 Clock Counter .................................................................................................................... 172
15.6 Presettable Shift Register (SIO1SFR) .............................................................................. 173
15.7 Wait Control Block ............................................................................................................. 175
15.8 Outline of Serial Interface Operation ............................................................................... 177
15.9 Status of Serial Interface on Reset .................................................................................. 178
16. PLL FREQUENCY SYNTHESIZER ............................................................................................... 179
16.1 Configuration of PLL Frequency Synthesizer ................................................................. 179
16.2 Functional Outline of PLL Frequency Synthesizer ......................................................... 180
16.3 Input Select Block and Programmable Divider ............................................................... 181
16.4 Reference Frequency Generator ...................................................................................... 186
16.5 Phase Comparator (φ-DET), Charge Pump, and Unlock Detection Block ..................... 188
16.6 PLL Disabled Status .......................................................................................................... 191
16.7 Using PLL Frequency Synthesizer ................................................................................... 191
16.8 Status on Reset .................................................................................................................. 195
17. FREQUENCY COUNTER .............................................................................................................. 196
17.1 Outline of Frequency Counter .......................................................................................... 196
17.2 Input/Output Select Block and Gate Time Control Block ............................................... 197
17.3 Start/Stop Control Block and IF Counter ......................................................................... 200
17.4 Using IF Counter Function ................................................................................................ 206
17.5 Error of External Gate Counter ......................................................................................... 208
17.6 Status on Reset .................................................................................................................. 208
18. BEEP .............................................................................................................................................. 209
18.1 General ............................................................................................................................... 209
18.2 I/O Select Block and Output Select Block ....................................................................... 210
18.3 Clock Select Block and Clock Generator Block .............................................................. 212
18.4 Output Waveform of BEEP ................................................................................................ 213
18.5 Status on Reset .................................................................................................................. 213
Data Sheet U10101EJ4V0DS
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