PD17012_15 Datasheet, PDF (53/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
6. GENERAL REGISTER (GR)
6.1 Outline of General Register
Figure 6-1 illustrates the general register.
As shown in the figure, the general register consists of a general register pointer and general register body.
The bank and row address of the general register body are specified by the general register pointer.
The general register body is used to transfer data and execute operations between data memory addresses.
Figure 6-1. Outline of General Register
General register
pointer
Column address
Data memory
General register
Transfer, operation
BANK0
BANK1
BANK2
System register
6.2 General Register Body
The general register body consists of 16 nibbles (16 × 4 bits) at the same row addresses in the data memory.
For the range of the banks and row addresses that can be specified by the general register pointer and general
register, refer to 5.7 General Register Pointer (RP).
The 16 nibbles of the same row address specified as a general register executes operations and transfers
data with the data memory using a single instruction.
In other words, operations or transfer between data memory addresses can be executed with a single
instruction.
The general register can be controlled by a data memory manipulation instruction like the other data memory
areas.
Data Sheet U10101EJ4V0DS
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