PD17012_15 Datasheet, PDF (169/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
15.2 Functional Outline of Serial Interface
The serial interface uses the P0A2/SCK1, P0A1/SO1, and P0A0/SI1 pins.
The serial interface can select the internal clock or an external clock, and can execute receive and transmit
The following subsections 15.2.1 to 15.2.6 outline the functions of the respective blocks of the serial
interface.
For details of each block, refer to 15.3 to 15.7.
15.2.1 Shift clock I/O pin control block
This block selects the shift clock I/O pin.
The shift clock I/O pin is selected by the serial I/O mode select register.
Refer to 15.3.
15.2.2 Serial data I/O pin control block
This block selects the serial data I/O pin.
The serial data I/O pin is selected by the serial I/O mode select register.
Refer to 15.3.
15.2.3 Clock generation block
This block selects the clock frequency of the shift clock and controls the shift clock output timing.
The shift clock frequency is selected by the serial I/O mode select register.
Refer to 15.4.
15.2.4 Clock counter
The clock counter counts the number of rising edges of the clock output by the shift clock output pin and
outputs a signal at the eighth clock (SF8 signal).
The SF8 signal is used to make serial communication wait (pause).
Refer to 15.5.
15.2.5 Presettable shift register (SIO1SFR)
This shift register sets serial out data and stores serial in data.
It performs a shift operation by using the clock of the shift clock I/O pin and inputs/outputs data.
The output data is set and the input data is read via the data buffer.
Refer to 15.6.
15.2.6 Wait control block
This block places or releases serial communication in or from the wait status.
Serial communication is placed in or released from the wait status by the serial I/O mode select register.
Refer to 15.7.
Data Sheet U10101EJ4V0DS
167