PD17012_15 Datasheet, PDF (81/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
Table 10-2. Relationship Between Each Port (Pin) and Port Register (2/2)
Pin
Port
No. Symbol
I/O
No pin
Port 2E
41 (49) P2E0
No pin
Port 2F
40 (48) P2F0
No pin
Port 2G
39 (47) P2G0
No pin
Port 2H
38 (46) P2H0
42 (50) PYA15
43 (52) PYA14
44 (53) PYA13
Port YA |
|
55 (65) PYA2
56 (66) PYA1
57 (67) PYA0
Output
Output
Output
Output
Output
Data Setting Method
Port Register (Data Memory)
Port Group Register (Peripheral Register)
Bank
Address
Symbol
Bit Symbol
(Reserved Word)
Peripheral
Address
Symbol
(Reserved Word)
Bit
b3
b2
70H – – –
b1
–––
b0
b3
b2
71H – – –
b1
–––
BANK2
b0
Fixed to 0
b3
b2
72H – – –
b1
–––
b0
b3
b2
73H – – –
b1
–––
b0
b3
P2E3
5FH P2E
b2
P2E2 Can be used as data memory
(multiplexed
with LCDD16)
b1
P2E1
b0
P2E0
b3
P2F3
5EH
P2F
b2
(multiplexed
with LCDD17)
b1
b0
BANK2
b3
P2F2
P2F1
P2F0
P2G3
Can be used as data memory
5DH P2G b2
(multiplexed
with LCDD18)
b1
b0
P2G2
P2G1
P2G0
Can be used as data memory
b3
P2H3
5CH
P2H
b2
(multiplexed
with LCDD19)
b1
b0
P2H2
P2H1
P2H0
Can be used as data memory
b15
b14
b13
42H
PYAR
|
(multiplexed with KSR)
b2
b1
b0
Remark Numbers in parentheses are pin numbers for 80-pin package.
Data Sheet U10101EJ4V0DS
79