PD17012_15 Datasheet, PDF (170/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
15.3 Shift Clock and Serial Data I/O Pin Control Blocks
The shift clock and serial data I/O pin control blocks set the pins of the serial interface and control the
transmit/receive operations.
These control operations are specified by the serial I/O mode select register.
15.3.1 shows the configuration and function of the serial I/O mode select register.
15.3.2 indicates the status of each pin set by the serial I/O mode select register.
15.3.1 Configuration and function of serial I/O mode select register
The configuration and function of the serial I/O mode select register are illustrated below.
The SIO1CK1 and SIO1CK0 flags are used to select the internal clock or an external clock and to set the
frequency of the internal clock.
For details of the clock, refer to 15.4.
The SIO1TS flag places or releases the serial interface in or from the wait status.
For the wait operation, refer to 15.7.
Name
Serial I/O mode select
register
Flag symbol Address
b3 b2 b1 b0
S S S S _02H
IIII
OOOO
1111
THCC
S I KK
Z10
Read/
write
R/W
Sets I/O clock frequency of serial interface
0 0 External clock (slave)
0 1 37.5 kHz (master)
1 0 75 kHz (master)
1 1 450 kHz (master)
Sets P0A1/SO1 pin as serial out pin
0
General-purpose I/O port
1
Serial out
Starts serial communication of serial interface
0
Does not start serial communication (wait)
1
Starts serial communication (wait release)
Power-on
Clock stop
CE
0000
0000
0000
168
Data Sheet U10101EJ4V0DS