PD17012_15 Datasheet, PDF (15/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

CONTENTS
µPD17012, 17P012
1. PIN FUNCTIONS ............................................................................................................................ 18
1.1 Pin Function List ................................................................................................................ 18
1.2 Pin Equivalent Circuits ...................................................................................................... 21
1.3 Recommended Connection of Unused Pins ................................................................... 25
1.4 Notes on Using CE and INT Pins ...................................................................................... 26
2. PROGRAM MEMORY (ROM) ........................................................................................................ 27
2.1 Outline of Program Memory .............................................................................................. 27
2.2 Program Memory ............................................................................................................... 28
2.3 Program Counter ............................................................................................................... 28
2.4 Program Flow ..................................................................................................................... 29
3. ADDRESS STACK (ASK) .............................................................................................................. 31
3.1 Outline of Address Stack .................................................................................................. 31
3.2 Address Stack Registers (ASR) ........................................................................................ 31
3.3 Stack Pointer (SP) .............................................................................................................. 32
3.4 Operation of Address Stack .............................................................................................. 33
3.5 Notes on Using Address Stack ......................................................................................... 33
4. DATA MEMORY (RAM) .................................................................................................................. 34
4.1 Outline of Data Memory .................................................................................................... 34
4.2 Configuration and Function of Data Memory .................................................................. 35
4.3 Addressing of Data Memory ............................................................................................. 37
4.4 Notes on Using Data Memory ........................................................................................... 38
5. SYSTEM REGISTER (SYSREG) ................................................................................................... 39
5.1 Outline of System Register ............................................................................................... 39
5.2 System Register List ......................................................................................................... 40
5.3 Address Register (AR) ....................................................................................................... 41
5.4 Window Register (WR) ...................................................................................................... 43
5.5 Bank Register (BANK) ....................................................................................................... 44
5.6 Index Register (IX) and Data Memory Row Address Pointer (MP: Memory Pointer) ... 45
5.7 General Register Pointer (RP) .......................................................................................... 47
5.8 Program Status Word (PSWORD) ..................................................................................... 49
5.9 Notes on Using System Register ..................................................................................... 50
6. GENERAL REGISTER (GR) .......................................................................................................... 51
6.1 Outline of General Register .............................................................................................. 51
6.2 General Register Body ...................................................................................................... 51
6.3 Address Generation of General Register by Instructions .............................................. 52
6.4 Notes on Using General Register ..................................................................................... 53
7. ALU (Arithmetic Logic Unit) BLOCK ........................................................................................... 54
7.1 Outline of ALU Block ......................................................................................................... 54
Data Sheet U10101EJ4V0DS
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