PD17012_15 Datasheet, PDF (125/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
Example
Example of timer updating processing and BTM0CY flag detection time interval
START:
CLR2
BTIMER:
; <1>
SKT1
BR
BTM0CK1, BTM0CK0 ; Sets BTM0CY flag setting pulse to 10 Hz (100 ms)
BTM0CY
AAA
; Updates timer if BTM0CY flag is “1”
; Branches to AAA if BTM0CY flag is “0”
Timer updating
BR
AAA:
BTIMER
Processing A
BR
BTIMER
The timing chart of the above program is shown below.
H
CE pin
L
BTM0CY flag ^H
setting pulse
L
1
BTM0CY flag
0
tSET
BTM0CY detection interval
tCHECK
<1> SKT1
BTM0CY
<2> SKT1
BTM0CY
Timer updating processing
tTIMER
CE reset
If this timer updating processing
time is too long, CE reset is effected
during processing.
(3) Correcting basic timer 0 carry at CE reset
Next, an example of correcting the timer at CE reset is described below.
As shown in the example below, the timer must be corrected at CE reset if the BTM0CY flag is used for
power failure detection and if the BTM0CY flag is used for a watch timer.
The BTM0CY flag is reset (to 0) first on power application (power-on reset), and is disabled from being
set until it is read once by the PEEK instruction.
If the CE pin goes high from low, a CE reset is effected in synchronization with the rising edge of the
BTM0CY flag setting pulse. At this time, the BTM0CY flag is set (to 1) and the timer is started.
By detecting the status of the BTM0CY flag at system reset (power-on reset or CE reset), therefore, it
can be identified whether a power-on reset or CE reset has been effected (power failure detection). That
is, a power-on reset has been effected if the flag is 0, and a CE reset has been effected if it is 1.
At this time, the watch timer must continue operating even if a CE reset has been effected.
However, because the BTM0CY flag is reset to 0 when it is read to detect a power failure, the set status
(1) of the BTM0CY flag is overlooked once.
Consequently, the watch timer must be updated if a CE reset is identified by means of power failure
detection.
For details of power failure detection, refer to 22. RESET.
Data Sheet U10101EJ4V0DS
123