PD17012_15 Datasheet, PDF (68/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
Table 8-1. Peripheral Hardware Control Functions of Control Registers (2/4)
Control Register
Peripheral Hardware Control Function
After Reset
Name
b3
Read/ b2
Address
Write b1
b0
Functional Outline
Set Value
0
1
SC
TE
O
P
Interrupt
request
register 1
R
INT
Detects status of INT pin
Low level
High level
––––––––––––––––––––– ––––––––––––––––––––– ––––––––––––––––––––– –– –
3FH
0
– – – – – – – – – _{Fixed to 0}
000
R/W 0
––––––––––––––––––––– ––––––––––––––––––––– ––––––––––––––––––
IRQ
Detects interrupt request (INT pin)
Not requested Requested
Basic timer
clock select 09H
register
BTM1CK1
0
0
1
1
– – – – – – – – – _{Sets clock of basic timer 1}
100 ms 250 ms 5 ms 1 ms
BTM1CK0
0
1
0
1
R/W ^{– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –} 0 0
BTM0CK1
0
0
1
1
– – – – – – – – – _{Sets clock of basic timer 0}
100 ms 250 ms 5 ms 1 ms
BTM0CK0
0
1
0
1
12-bit timer
clock select
register
0CH
0
–––––––––
0
Fixed to 0
R/W ^{– – – – – – – – –}
00
0
––––––––––––––––––––– ––––––––––––––––––––– ––––––––––––––––––
TMCK
Sets clock of 12-bit timer
50 µs
10 µs
12-bit timer
overflow
register
0DH
0
–––––––––
0
Fixed to 0
R –––––––––
00
0
––––––––––––––––––––– ––––––––––––––––––––– ––––––––––––––––––
TMOVF Detects overflow of timer/counter
No overflow
Overflow
12-bit timer
control
0EH
register
0
Fixed to 0
––––––––––––––––––––– ––––––––––––––––––––– ––––––––––––––––––
TMRPT Selects operation mode of 12-bit timer
Free-run count mode Modulo count mode
R/W – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – 0 0
TMRES Resets timer/counter
Does not reset
Resets
––––––––––––––––––––– ––––––––––––––––––––– ––––––––––––––––––
TMEN
Sets operation of timer/counter
Does not operate Operates
Basic timer 0
carry FF
judge
17H
register
0
–––––––––
R& 0
Fixed to 0
Reset – – – – – – – – –
011
0
––––––––––––––––––––– ––––––––––––––––––––– ––––––––––––––––––
BTM0CY Detects status of carry FF
Reset
Set
A/D
converter
compare
judge
register
06H
0
–––––––––
0
Fixed to 0
R –––––––––
0
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
ADCCMP Detects comparison result
VADCIN < VREF
VADCIN > VREF
A/D
converter
channel
select
register
14H
0
– – – – – – – – – Fixed to 0
0
R/W – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – 3 3 3
ADCCH1
0
0
1
1
– – – – – – – – – _{Selects pins to be used for A/D converter}
ADC0 ADC1 Not used Not used
ADCCH0
0
1
0
1
PWM mode
select
13H
register
0
– – – – – – – – – _{Fixed to 0}
0
R/W ^{– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –} 0 0
PWM1SEL PWM1 pin
General-
–––––––––
Set for D/A converter
purpose
D/A converter
PWM0SEL PWM0 pin
output port
66
Data Sheet U10101EJ4V0DS