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PD17012_15 Datasheet, PDF (211/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE
µPD17012, 17P012
18. BEEP
18.1 General
Figure 18-1 shows the outline of BEEP.
BEEP outputs 1 kHz, 3 kHz, 200 Hz, or 9 kHz clock from the P0B0/BEEP0 and P0B1/BEEP1 pins.
Figure 18-1. Outline of BEEP
P0B1/BEEP1
P0B0/BEEP0
P0BBIO1 flag
BEEP1SEL flag
BEEP1CK1 flag
BEEP1CK0 flag
I/O select
block
I/O select
block
Output select
block
Clock
select
block
Output latch
Output latch
Output select
block
Clock
select
block
Clock
generation block
1 kHz
3 kHz
200 Hz
9 kHz
P0BBIO0 flag
BEEP0SEL flag
BEEP0CK1 flag
BEEP0CK0 flag
Remarks 1. P0BBIO1 and P0BBIO0 (bits 1 and 0 of the port 0B bit I/O select register; refer to Figure 18-2) set the
P0B1/BEEP1 and P0B0/BEEP0 pins in the input/output mode.
2. BEEP1SEL and BEEP0SEL (bits 1 and 0 of the BEEP select register; refer to Figure 18-3) set the P0B1/
BEEP1 and P0B0/BEEP0 pin in the general-purpose output port or BEEP output mode.
3. BEEP1CK1, BEEP1CK0, BEEP0CK1, and BEEP0CK0 (bits 3 to 0 of the BEEP clock select register;
refer to Figure 18-4) set the output frequencies of BEEP1 and BEEP0.
Data Sheet U10101EJ4V0DS
209