PD17012_15 Datasheet, PDF (266/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
21.5.3 Notes on using clock stop instruction
The clock stop (STOP s) instruction is valid only while the CE pin is low.
Therefore, processing to be performed if the CE pin happens to be high must be taken into consideration.
Take the following program as an example.
Example
XTAL
CEJDG:
; <1>
SKF1
BR
DAT 0000B ; Symbol definition of clock stop condition
CE
MAIN
; Embedded macro
; Detects input level of CE pin
; Branches to main processing if CE = high
Processing A
; <2>
STOP
; <3>
BR
MAIN:
XTAL
$–1
Main processing
; Processing of CE = low
; Clock stop
BR
CEJDG
In the above example, the status of the CE pin is detected in <1>. If the CE pin is low, processing A is
performed and then the clock stop instruction “STOP XTAL” in <2> is executed.
If the CE pin goes high while the STOP XTAL instruction in <2> is executed, however, the STOP XTAL
instruction is treated as a no-operation (NOP) instruction.
Should branch instruction “BR$ – 1” in <3> be missing at this time, the program would execute the main
processing, causing malfunctioning.
Therefore, either a branch instruction must be inserted as in <3>, or the program must be designed in the
manner that malfunctioning does not occur even if the main processing is executed.
If a branch instruction is used as in <3>, CE reset is executed in synchronization with the next setting of the
timer carry FF even while the CE pin is high.
5V
VDD
0V
H
CE pin
L
Main
processing Processing A
<1> <1> <1> <2> STOP XTAL is treated as
Detection NOP instruction because
of CE pin _{CE pin is high.}
Program starts from address 0
in synchronization with setting of
basic timer 0 carry FF (CE reset).
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Data Sheet U10101EJ4V0DS