PD17012_15 Datasheet, PDF (105/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
11.3 Interrupt Stack Register
11.3.1 Configuration and function of interrupt stack register
Figure 11-7 shows the configuration of the interrupt stack register and the system register whose contents
are saved to the interrupt stack register.
The interrupt stack register saves the contents of the following system registers when an interrupt is
acknowledged.
• Bank register (BANK)
• General register pointer (RP)
• Program status word (PSWORD)
When an interrupt is acknowledged and the contents of the above system registers are saved to the interrupt
stack register, the contents of the above system registers are reset to 0.
The interrupt stack can save up to 2 levels of the contents of the above system registers.
Therefore, up to 2 levels of multiple interrupts can be executed.
The contents of the interrupt stack register are restored to the system registers when an interrupt return
instruction (“RETI”) is executed.
Figure 11-7. Configuration of Interrupt Stack Register
Name
Bit
0H
1H
Interrupt stack register (INTSK)
Bank stack Register pointer stack high Register pointer stack low Status stack
b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0
––
––
––
––
Remark –: Bit not saved
Data Sheet U10101EJ4V0DS
103