PD17012_15 Datasheet, PDF (267/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
21.6 Device Operations in Halt and Clock Stop Status
Table 21-1 shows the operations of the CPU and peripheral hardware in the halt status and clock stop status.
As shown in this table, all the peripheral hardware units continue the normal operation in the halt status,
except that instruction execution is stopped.
All the peripheral hardware units stop operation in the clock stop status.
The control registers that control the operations of the peripheral hardware units operate normally in the halt
status (i.e., are not initialized), but are initialized to specific values in the clock stop status (as soon as the STOP
s instruction has been executed).
To put in another way, the peripheral hardware units continue the operations set by the control registers in
the halt status, and operate in accordance with the control registers that are initialized to specific values in the
clock stop status.
For the values to which the control registers are initialized, refer to 8. REGISTER FILE (RF).
The following shows an example.
Example When the P0A0/SI1 pin of port 0A is specified as an output port pin, and the P0A1/SO1 and P0A2/SCK1
pins are used for the serial interface
HLTINT DAT 1000B
XTAL
DAT 0000B
INITFLG P0ABI02, P0ABI01, P0ABI00
; <1>
SET3
P0A2, P0A1, P0A0
; <2>
INITFLG SI01HIZ, SI01CK1, SI01CK0
CLR1
IRQSI01
SET1
IPSI01
EI
; <3>
SET1
SI01TS
; <4>
HALT
HLTINT
; <5>
STOP
XTAL
In the above example, the P0A2 through P0A0 pins output a high level in <1>, the condition of serial interface
1 is set in <2>, and serial communication is started in <3>.
When the HALT instruction is executed in <4>, serial communication continues and the halt status is released
when the interrupt by serial interface 1 is acknowledged.
If the STOP instruction in <5> is executed instead of the HALT instruction in <4>, the contents of all the control
registers set in <1>, <2>, and <3> are initialized. Consequently, serial communication is stopped, and all the
pins of port 0A are set in the general-purpose input port mode.
Data Sheet U10101EJ4V0DS
265