PD17012_15 Datasheet, PDF (48/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
5.6.2 Functions of index register and data memory row address pointer
The index register and data memory row address pointer modify the addresses of the data memory.
The following paragraphs (1) and (2) explain the functions of the index register and data memory row address
pointer, respectively.
A dedicated instruction (“INC IX”) that can increment the value of the address register by one is also available.
For details on address modification, refer to 7. ALU (Arithmetic Logic Unit) BLOCK.
(1) Index register
The index register modifies a specified data memory address according to the contents of the index
register when a data memory manipulation instruction is executed.
This modification, however, is valid only when the IXE flag is set to 1.
To modify an address, the bank, row address, and column address of the data memory are ORed with
the contents of the index register, and the instruction is executed to the data memory whose address
(called an actual address) is specified by the result of this OR operation.
All the data memory manipulation instructions are subject to address modification by the index register.
The following instructions are not subject to modification by the index register.
INC
INC
MOVT
PUSH
POP
PEEK
POKE
GET
PUT
BR
BR
AR
IX
DBF, @AR
AR
AR
WR, rf
rf, WR
DBF, p
p, DBF
addr
@AR
RORC r
CALL addr
CALL @AR
RET
RETSK
RETI
EI
DI
STOP s
HALT h
NOP
(2) Data memory row address pointer
The data memory row address pointer modifies the address at the indirect transfer destination when a
general register indirect transfer instruction (“MOV @r, m” or “MOV m, @r”) is executed.
However, this modification is valid only when the MPE flag is set to 1.
To modify the address, the bank and row address at the transfer destination are replaced with the
contents of the data memory row address pointer.
Instructions other than general register indirect transfer instructions are not subject to address
modification.
(3) Index register increment instruction (“INC IX”)
This instruction increments the contents of the index register by one.
Because the index register is configured from 9 bits, the contents of the index register are cleared to 000H
if the INC IX instruction is executed when the contents of the index register are 1FFH.
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Data Sheet U10101EJ4V0DS