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PD17012_15 Datasheet, PDF (264/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE
µPD17012, 17P012
21.5 Clock Stop Function
The clock stop function stops the 4.5 MHz crystal oscillator by executing the STOP s instruction (clock
stop status).
Therefore, the current consumption of the device is decreased to the minimum value of 10 µA.
Specify “0000B” as operand “s” of the STOP s instruction.
The STOP s instruction is valid only while the CE pin is low.
It is executed as a no-operation (NOP) instruction even when executed while the CE pin is high.
In other words, the STOP s instruction must be executed while the CE pin is low.
The clock stop status is released by raising the level of the CE pin from low to high (CE reset).
The following subsections 21.5.1 through 21.5.3 explain the clock stop status, how to release the clock stop
status, and notes on using the clock stop instruction.
21.5.1 Clock stop status
Because the crystal oscillator is stopped in the clock stop status, all the device operations, such as those
of the CPU and peripheral hardware, are stopped.
For the operations of the CPU and peripheral hardware, refer to 21.6 Device Operations in Halt and Clock
Stop Status.
The power failure detector does not operate in the clock stop status even if the supply voltage VDD of the device
is lowered to 2.3 V. Therefore, the data memory can be backed up at a low voltage. For details of the power
failure detector, refer to 22. RESET.
21.5.2 Releasing clock stop status
The clock stop status is released either by raising the level of the CE pin from low to high (CE reset), or by
lowering the supply voltage VDD of the device to 2.3 V or less once, and then increasing it to 3.5 V (power-on
reset).
Figures 21-4 and 21-5 show how the clock stop is released on CE reset and power-on reset respectively.
If the clock stop status is released by power-on reset, the power failure detector operates.
For details of power-on reset, refer to 22.4 Power-on Reset.
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Data Sheet U10101EJ4V0DS