PD17012_15 Datasheet, PDF (253/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
21. STANDBY
The standby function is used to reduce the current consumption of the device during back up.
21.1 Configuration of Standby Block
Figure 21-1 shows the configuration of the standby block.
As shown in the figure, the standby block is divided into two blocks: halt control block and clock stop control
block.
The halt control block consists of a halt controller, interrupt control block, timer carry, and key input pins
P0D0/K0 to P0D3/K3, and controls the operation of the CPU (program counter, instruction decoder, and ALU
block).
The clock stop control block controls the 4.5 MHz crystal oscillator, CPU, system register, and control
registers, by using the clock stop controller.
Figure 21-1. Configuration of Standby Block
Halt block
Interrupt
block
Basic timer 0
P0D3/K3 pin
P0D2/K2 pin
P0D1/K1 pin
P0D0/K0 pin
Input latch
CE pin
XOUT pin
Clock stop block
CE flag
Halt controller
HALT h
Clock stop controller
STOP s
CPU
Program counter (PC)
Instruction decoder
ALU
System register
Control register
XIN pin
Internal block
Remark CE (bit 0 of the CE pin level judge register; refer to 21.3.5 Configuration and function of CE pin level
judge register)
Detects the CE pin status.
Data Sheet U10101EJ4V0DS
251