PD17012_15 Datasheet, PDF (140/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
12.4.3 Count block
The count block counts the basic clock by using a 12-bit timer/counter. When the count value matches the value
of the timer modulo register, the count block issues an interrupt request.
The value of the timer/counter can be written or read via the data buffer.
The basic clock that is input to the timer/counter can be started or stopped by the TMEN flag.
The timer/counter can be reset by the TMRES flag.
The timer/counter is not automatically reset even when its count value matches the value of the timer modulo
register.
Either the modulo count mode or free-run count mode can be set by the TMRPT flag.
In the free-run count mode, the contents of the timer/counter are not reset even after a match between the value
of the timer/counter and the contents of the timer modulo register has been detected; therefore, the timer/counter
continues counting up.
In the modulo counter mode, the contents of the timer/counter are reset and then the timer/counter continues
counting when a match between the count value of the timer/counter and the contents of the timer modulo register
has been detected.
An overflow in the counter, if any, can be detected by the TMOVF flag. If an overflow has been detected, the
counting operation is stopped.
Figure 12-17 shows the configuration and function of the 12-bit timer control register.
Figure 12-18 shows the configuration and function of the 12-bit timer overflow register.
Figures 12-19 and 12-20 show the configurations of the timer/counter and timer modulo register respectively.
Figure 12-17. Configuration of 12-Bit Timer Control Register
Name
12-bit timer control
register
Flag symbol Address
b3 b2 b1 b0
0 T T T 0EH
MM M
RR E
PE N
TS
Read/
write
R/W
0 Stops
1 Starts
Starts/stops timer/counter
Restarts timer/counter^Note
0
Does not reset
1
Resets
Sets mode of 12-bit timer
0
Free-run count mode
1
Modulo count mode
Fixed to 0
Power-on
Clock stop
CE
0000
000
Retained
Note The TMRES flag is always 0 when it is read.
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Data Sheet U10101EJ4V0DS