PD17012_15 Datasheet, PDF (241/320 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17012, 17P012
20.5 Key Input Control Block
20.5.1 Configuration of key input control block
Figure 20-7 shows the configuration of the key input control block.
Figure 20-7. Configuration of Key Input Control Block
VDD
P0D3/K3
P0D0/K0
Input latch
Half release signal
P0D port register
High ON resistance
Segment signal/key source signal
output timing control block
KEYJ flag
20.5.2 Function of key input control block
The key input control block controls the timing to read the key input signals from the P0D3/K3 to P0D0/K0 pins
and reads the key input data.
Figure 20-8 illustrates the key input signals and key input timing.
As shown in this figure, the internal-pull down resistors of the P0D3/K3 to P0D0/K0 pins are turned off while
the display data of the LCD segment is output, and turned on only for 220 µs while the key source signal is output.
For the duration of 220 µs during which the key source signal is output, the input signal of each key input
pin is connected to the input latch.
Therefore, the signal input to each key input pin can be detected in the 220 µs during which the key source
signal is output.
Figure 20-9 shows the timing chart of the key source signal, key input signal, and key input data (P0D port
register).
Whether a key source signal is output or not is detected by the KEYJ flag of the key input judge register (RF
address 16H).
The KEYJ flag is set after the key source signal has been output for 220 µs, and is reset when data has been
set to the key source data register and when the content of the KEYJ flag has been read.
By detecting the KEYJ flag after the key source signal data has been output to the key source data register,
and then detecting the status of each key input pin after the KEYJ flag has been set to 1, the key can be input.
The following subsection 20.5.3 explains the configuration and function of the key input judge register.
Data Sheet U10101EJ4V0DS
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