Z80180 Datasheet, PDF (60/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z 8018x Fam ily
M PU Us e r M anual
45
Table 6. I/O Address Map for Z80180-Class Processors Only (Continued)
Address
Register
Timer Data Register Ch 0 L
Data Register Ch 0 H
Reload Register Ch 0 L
Reload Register Ch 0 H
Timer Control Register
Reserved
Mnemonic Binary
Hex
TMDR0L
XX001100 0CH
TMDR0H XX001101 0DH
RLDR0L
XX001110 0EH
RLDR0H
XX001111 0FH
TCR
XX010000 10H
XX010001 11H
Page
159
159
159
159
161
Data Register Ch 1 L
Data Register Ch 1 H
Reload Register Ch 1 L
Reload Register Ch 1 H
Others Free Running Counter
Reserved
TMDR1L
TMDR1H
RLDR1L
RLDR1H
FRC
XX010011 13H
XX010100 14H 160
XX010101 15H 160
XX010110 16H 159
XX010111 17H 159
XX011000 18H 172
XX011001 19H
XX011111 1FH
UM005001-ZMP0400