Z80180 Datasheet, PDF (230/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z8018x Family
MPU User Manual
214
Table 38. Arithmetic and Logical Instructions (8-bit) (Continued)
Flags
Operation
Name
Mnemonics
OR
OR g
OR (HL)
OR m
OR (IX + d)
OR (IY + d)
SUB
SUB g
SUB (HL)
SUB m
SUB (IX + d)
SUB (IY + d)
Addressing
Op Code Immed Ext Ind Reg RegI Imp Rel Bytes States Operation
10 110 g
10 110 110
11 110 110 S
<m>
11 011 101
10 110 110
<d>
11 111 101
10 110 110
<d>
10 010 g
10 010 110
11 010 110 S
<m>
11 011 101
10 011 110
<d>
11 111 101
10 010 110
<d>
S
D
SD
D
S
D
14
16
26
Ar + gr→ Ar
Ar + (HL)_M→ Ar
Ar + m→ Ar
3
14 Ar + (IX + d)_M→ Ar
S
D
3
14 Ar + (IY + d)_M→ Ar
S
D
SD
D
S
D
14
16
26
Ar-gr→ Ar
Ar-(HL)_M→ Ar
Ar-m→ Ar
3
14 Ar-(IX + d)_M-c→ Ar
S
D
3
14 Ar-(IY + d)_M-c→ Ar
764 2 10
S Z H P/V N C
↑↑RP RR
↑↑RP RR
↑↑RP RR
↑↑RP RR
↑↑RP RR
↑↑↑V S↑
↑↑↑V S↑
↑↑↑V S↑
↑↑↑V S↑
↑↑↑V S↑
UM005001-ZMP0400