Z80180 Datasheet, PDF (298/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z 8018x Fam ily
M PU Us e r M anual
282
Table 53. Request Acceptances in Each Operating Mode
Request
Current Normal
Status Operation
(CPU mode
and IOSTOP
Mode)
Refresh
WAIT State Cycle
Interrupt
Acknowledge
Cycle
BUS
RELEASE SLEEP
DMA Cycle Mode
Mode
Internal ↑
I/O
Interrupt
↑
↑
↑
↑
↑
↑
NMI ↑
↑
↑
Not acceptable Acceptable
Interrupt
DMA cycle
acknowledge stops
cycle precedes.
NMI is accepted
after executing
Note: * Not acceptable when DMA Request is in level-sense.
↑: Same as above.
MC: Machine Cycle
SYSTEM
STOP
Mode
Not
acceptable
Acceptable
Return from
SYSTEM
STOP mode
to normal
operation
REQUEST PRIORITY
The Z80180 features three types of requests.
.
Table 54. The Z80180 Types of Requests
Type 1
Type 2
Type 3
Accepted in specified state
WAIT
Accepted in each machine cycle Refresh Request, DMA
Request, and Bus Request.
Accepted in each instruction
Interrupt Request
Type 1, Type 2, and Type 3 requests priority as follows.
• Highest priority Type 1 > Type 2 > Type 3 lowest priority
• Each request priority in Type 2 is shown as follows. highest priority
Bus Req. > Refresh Req. > DMA Request lowest priority
UM005001-ZMP0400