Z80180 Datasheet, PDF (269/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z8018x Family
MPU User Manual
253
Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)
Instruction
AND (IY+ d)
OR (IX + d)
OR (IY+d)
XOR (IX + d)
XOR (IY+d)
CP (IX+d)
CP (IY+d)
BIT b,g
BIT b, (HL)
BIT b, (IX+d)
BIT b, (IY+d)
Machine
Cycle States Address
MC4
~MC6
TiTiTi *
Data
Z
RD WR MREQ IORQ M1 HALT ST
111
1
11
1
MC6
MC1
MC2
MC1
MC2
MC3
MC1
MC2
MC3
MC4
MC5
T1T2T3 IX+d
IY+d
DATA 0 1 0
T1T2T3 1st Op Code 1st
010
Address
Op Code
T1T2T3 2nd Op Code 2nd
010
Address
Op Code
T1T2T3 1st Op Code 1st
010
Address
Op Code
T1T2T3 2nd Op Code 2nd
010
Address
Op Code
T1T2T3 HL
DATA 0 1 0
T1T2T3 1st Op Code 1st Op
Address
Code
010
T1T2T3 2nd Op Code 2nd Op
Address
Code
010
T1T2T3 1st operand d
Address
010
T1T2T3 3rd Op Code 3rd Op
Address
Code
010
T1T2T3 IX+ d
IY+d
DATA 0 1 0
1
11
1
1
01
0
1
01
1
1
01
0
1
01
1
1
11
1
1
01
0
1
01
1
1
11
1
1
01
1
1
11
1
UM005001-ZMP0400