Z80180 Datasheet, PDF (303/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z8018x Family
MPU User Manual
287
Status Signals
PIN OUTPUTS IN EACH OPERATING MODE
Table 55 describes pin outputs in each operating mode.
Table 55. Pin Outputs in Each Operating Mode
Mode
Address Data
M1 MREQ IORQ RD WR RFSH HALT BUSACK ST BUS BUS
CPU
Operation
Op Code Fetch 0 0
(1st Op Code)
Op Code Fetch 0 0
(except 1 st Op
Code)
MemRead
10
Memory Write 1 0
I/O Read
11
I/O Write
11
Internal
Operation
11
Refresh
10
Interrupt
NMI
00
Acknowledge
Cycle
INT0
01
(1st Machine _{INT1, INT2 & 1 1}
Cycle)
Internal
Interrupts
BUS RELEASE
1Z
HALT
00
SLEEP
11
1
011
1
1
1
011
1
1
1
011
1
1
1
101
1
1
0
011
1
1
0
101
1
1
1
111
1
1
1
110
1
1
1
011
1
1
0
111
1
1
1
111
1
1
Z
ZZ1
1
0
1
011
0
1
1
111
0
1
0A
IN
1A
IN
1A
1A
1A
1A
1A
*A
0A
0A
0A
IN
OUT
IN
OUT
IN
IN
IN
IN
IN
*Z
IN
0A
IN
11
IN
UM005001-ZMP0400