Z80180 Datasheet, PDF (100/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z 8018x Fam ily
M PU Us e r M anual
85
Z8X180. Figure 43 illustrates the INT1, INT2 and internal interrupts
timing.
Table 10. RETI Control Signal States
Machine
Cycle States Address Data
MI
RD WR MREQ IORQ M1E=1 M1E=0 HALT ST
1
T1-T3 1st
EDH 0 1
0
1
0
1
10
Op Code
2
TI-T3 2nd
4DH 0 1
0
1
0
1
11
Op Code
3
T1 Don't 3-state 1 1
1
1
1
1
11
Care
4
T1 Don't 3-state 1 1
1
1
1
1
11
Care
5
T1 Don't 3-state 1 1
1
1
1
1
11
Care
6
T1-T3 1st
EDH 0 1
0
1
0
0
11
Op Code
7
T1 Don't 3-state 1 1
1
1
1
1
11
Care
8
T1-T3 2nd
4DH 0 1
0
1
0
1
11
Op Code
9
T1-T3 SP
data
01
0
1
1
1
11
10
T1-T3 SP+1 data
01
0
1
1
1
11
IOC affects the IORQ/RD signals. M1E affects the assertion of M1. One state also reflects a 1 while
the other reflects a 0
UM005001-ZMP0400