Z80180 Datasheet, PDF (239/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z8018x Family
MPU User Manual
223
Table 41. 8-Bit Load (Continued)
Flags
Operation
Name
Mnemonics
Op Code
Addressing
Immed Ext Ind Reg RegI Imp Rel Bytes States Operation
7642 10
S Z H P/V N C
Load
LD (IX + d),m 11 011 101 S
D
8-Bit
Data
00 110 110
<d>
4
15 m→ (IX + d)_M • • • • • •
LD (IY + d),m 11 111 101 S
D
01 110 g
4
15 m→ (IY + d)_M • • • • • •
<d>
<m>
LD (HL),g
LD (IX + d),g
01 110 g
11 011 101
01 110 g
SD
DS
1
7
gr→ (HL)_M
•••• ••
3
15 gr→ (IX+d)_M • • • • • •
<d>
LD (IY + d),g 11 111 101
01 110 g
DS
3
15 gr→ (IY + d)_M • • • • • •
<d>
(1) In the case of R1 and Z Mask, interrupts are not sampled at the end of LD A, I or LD A,R.
Table 42. 16-Bit Load
Operation
Name Mnemonics Op Code
Load
16-Bit
Data
LD ww,mn
LD IX,mn
00 ww0 001
<n>
<m>
11 011 101
00 100 001
<n>
<m>
Addressing
Immed Ext Ind Reg RegI Imp Rel Bytes States Operation
S
D
3
9
mn→ ww_R
S
D
4
12
mn→ IX_R
Flags
7642 10
S Z H P/V N C
•••• ••
•••• ••
UM005001-ZMP0400