Z80180 Datasheet, PDF (188/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z 8018x Fam ily
M PU Us e r M anual
173
Software Architecture
INSTRUCTION SET
The Z80180 is object code-compatible with the Z80 CPU. Refer to the
Z80 CPU Technical Manual or the Z80 Assembly Language
Programming Manual for further details.
Table 26. Instruction Set Summary
New Instructions Operation
SLP
Enter SLEEP mode
MLT
8-bit multiply with 16-bit result
INO g, (m)
Input contents of immediate I/O address
OUT0 (m), g
Output register contents to immediate I/O address
OTIM
Block output - increment
OTIMR
Block output - increment and repeat
OTDM
Block output - decrement
OTDMR
Block output - decrement and repeat
TSTIO m
Non-destructive AND, I/O port, and accumulator
TST g
Non-destructive AND, register, and accumulator
TST m
Non-destructive AND, immediate data, and accumulator
TST (HL)
Non-destructive AND, memory data, and accumulator
SLP - Sleep
The SLP instruction causes the Z80180 to enter the SLEEP low power
consumption mode. See page 32 for a complete description of the SLEEP
state.
UM005001-ZMP0400