Z80180 Datasheet, PDF (309/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z8018x Family
MPU User Manual
293
I/O Registers
INTERNAL I/O REGISTERS
By programming IOA7 and IOA6 as the I/O control register, internal I/O
register addresses are relocatable within ranges from0000H to 00FFH in
the I/O address space.
Table 57. Internal I/O Registers
Register
Mnemonics Address
Remarks
ASCI Control Register A CNTLA0
Channel 0:
00
MPBR/
bit
MPE
RE
TE
RTS0 _EFR MOD2 MOD1 MOD0
during RESET
0
0
0
1
invalid 0
0
0
R/W
R/W R/W R/W R/W R/W R/W R/W R/W
ASCI Control Register A CNTLA1
Channel 1:
MODE Selection
Multi Processor Bit Receive/
Error Fl1ag Reset
Request to Send
Transmit Enable
Receive Enable
Multi Processor Enable
01
MPBR/
bit
MPE
RE
TE CKA1D _EFR MOD2 MOD1 MOD0
during RESET
0
0
0
1 invalid 0
0
0
R/W
R/W R/W R/W R/W R/W R/W R/W R/W
MODE Selection
Multi Processor Bit Receive/
Error Flag Reset
CKA1 Disable
Transmit Enable
Receive Enable
Multi Processor Enable
MOD 2 1 0
0 0 0 Start + 7 bit Data + 1 Stop
0 0 1 Start + 7 bit Data + 2 Stop
0 1 0 Start + 7 bit Data + Parity + 1 Stop
0 1 1 Start + 7 bit Data + Parity + 2 Stop
1 0 0 Start + 8 bit Data + 1 Stop
1 0 1 Start + 8 bit Data + 2 Stop
1 1 0 Start + 8 bit Data + Parity + 1 Stop
1 1 1 Start + 8 bit Data + Parity + 2 Stop
UM005001-ZMP0400