Z80180 Datasheet, PDF (56/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z 8018x Fam ily
M PU Us e r M anual
41
except that the 2¹⁷ bit wake-up timer is bypassed. All control signals are
asserted eight clock cycles after the exit conditions are gathered.
STANDBY-QUICK RECOVERY Mode
STANDBY-QUICK RECOVERY mode is an option offered in
STANDBY mode to reduce the clock recovery time in STANDBY mode
from 2¹⁷ clock cycles (4 µs at 33 MHz) to 2⁶ clock cycles (1.9 µs at 33
MHz). This feature can only be used when providing an oscillator as
clock source.
To enter STANDBY-QUICK RECOVERY mode:
1. Set bits 6 and 3 to 1 and 1, respectively.
2. Set the I/O STOP bit (bit 5 of ICR, I/O Address = 3FH) to 1.
3. Execute the SLEEP instruction
When the part is in STANDBY-QUICK RECOVERY mode, the
operation is identical to STANDBY mode except when exit conditions
are gathered, using RESET, BUS REQUEST or EXTERNAL
INTERRUPTS. The clock and other control signals are recovered sooner
than the STANDBY mode.
Note: If STANDBY-QUICK RECOVERY is enabled, the user must
ensure stable oscillation is obtained within 64 clock cycles
Internal I/O Registers
The Z8X180 internal I/O Registers occupy 64 I/O addresses (including
reserved addresses). These registers access the internal I/O modules
(ASCI, CSI/O, PRT) and control functions (DMAC, DRAM refresh,
interrupts, wait state generator, MMU and I/O relocation).
UM005001-ZMP0400