Z80180 Datasheet, PDF (229/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z8018x Family
MPU User Manual
213
Table 38. Arithmetic and Logical Instructions (8-bit) (Continued)
Flags
Operation
Name
Mnemonics
Addressing
Op Code Immed Ext Ind Reg RegI Imp Rel Bytes States Operation
764 2 10
S Z H P/V N C
DEC
INC
MULT
NEGATE
DEC g
DEC (HL)
DEC (IX + d)
DEC (IY + d)
INC g
INC (HL)
INC (IX + d)
INC (IY + d)
MLT ww**
NEG
00 g 101
00 110 101
11 011 101
00 110 101
<d>
11 111 101
00 1101 01
<d>
00 g 100
00 110 100
11 011 101
00 110 100
<d>
11 111 101
00 110 100
<d>
11 101 101
01 WWI
100
11 101 101
01 000 100
S/D
S/D
S/D
S/D
S/D
S/D
S/D
S/D
S/D
1
4
gr-1→ gr
↑↑↑V S•
1
10 (HL)_M-1→ (HL)_M
↑↑↑V S•
3
18 (IX + d))_M-I→
↑↑↑V S•
(IX + d))_M
3
18 (IY + d)_M-1→
(IY + d)_M
↑↑↑V S•
1
4
gr + I→ gr
↑↑↑V R•
1
10 (HL)_M + I→ (HL)_M ↑ ↑ ↑ V R •
3
18 (IX + d))_M + 1→
↑↑↑V R•
(1X + d))_M
3
18 (IY + d)v + 1→
(IY + d)v
↑↑↑V R•
2
17 wwHr→ wwLr→ wwI • • • • • •
S/D
2
6
0-Ar→ Ar
↑↑↑Y S↑
UM005001-ZMP0400