Z80180 Datasheet, PDF (176/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z 8018x Fam ily
M PU Us e r M anual
161
Timer Reload Register Channel 1L (RLDR1L: 16H)
Bit
7
6
5
4
3
2
1
0
Bit/Field
Timer Reload Data
R/W
R/W
Reset
0
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Timer Reload Register Channel 1H (RLDR1H: 17H)
Bit
7
6
5
4
3
2
1
0
Bit/Field
Timer Reload Data
R/W
R/W
Reset
0
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Timer Control Register (TCR)
TCR monitors both channels (PRT0, PRT1) TMDR status. It also controls
enabling and disabling of down counting and interrupts along with
controlling output pin A18/TOUT for PRT1.
Timer Control Register (TCR: 10H)
Bit
7
6
5
4
3
Bit/Field TIF1 TIF0 TIE1 TIE0 TOC1
R/W
R
R
R/W R/W R/W
Reset
0
0
0
0
0
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
2
TOC0
R/W
0
1
TDE1
R/W
0
0
TDE0
R/W
0
UM005001-ZMP0400