Z80180 Datasheet, PDF (228/326 Pages) Zilog, Inc. – Z8018x Family MPU

Z8018x Family
MPU User Manual
212
Table 38. Arithmetic and Logical Instructions (8-bit) (Continued)
Flags
Operation
Name
Mnemonics
Addressing
Op Code Immed Ext Ind Reg RegI Imp Rel Bytes States Operation
764 2 10
S Z H P/V N C
AND
AND g
AND (HL)
AND m
AND (IX + d)
AND (IY + d)
Compare
CP g
CP (HL)
CP m
CP (IX + d)
CP (IY + d)
Compleme CPL
nt
10 100 g
10 100 110
11 100 110 S
<m>
11 011 101
10 100 110
<d>
11 111 101
10 100 110
<d>
10 111 g
10 111 110
11 111 110 S
<m>
11 011 101
10 111 110
<d>
11 111 101
10 111 110
<d>
00 101 111
S
D
SD
D
S
D
S
D
S
D
SD
D
S
D
S
D
S/D
14
16
26
Ar*gr→ Ar
Ar*(HL)_M→ Ar
Ar*m→ Ar
↑↑S P RR
↑↑S P RR
↑↑S P RR
3
14 Ar*(1X + d))_M→ Ar ↑ ↑ S P R R
3
14 Ar*(1Y + d)v→ Ar ↑ ↑ S P R R
14
16
26
Ar-gr
Ar-(HL)_M
Ar-m
3
14 Ar-(IX + d))_M
↑↑↑V S↑
↑↑↑V S↑
↑↑↑V S↑
↑↑↑V S↑
3
14 Ar-(IY + d))_M
↑↑↑V S↑
13
Ar→ Ar
••S • S •
UM005001-ZMP0400