M16C62P_06 Datasheet, PDF (86/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
8. Bus
(1) Separate Bus, 3-Wait Setting
BCLK
Write signal
Read signal
Data bus
Address bus
CS
Bus cycle ⁽¹⁾
Output
Address
Bus cycle (1)
Input
Address
(2) Multiplexed Bus, 1- or 2-Wait Setting
Bus cycle ⁽¹⁾
BCLK
Write signal
Read signal
ALE
Address bus
Address
Address bus/
Data bus
Address
CS
Data output
(3) Multiplexed Bus, 3-Wait Setting
BCLK
Bus cycle ⁽¹⁾
Write signal
Read signal
ALE
Address bus
Address bus/
Data bus
Address
CS
Address
Data output
Bus cycle ⁽¹⁾
Address
Address
Input
Bus cycle ⁽¹⁾
Address
Address
Input
NOTES :
1. These example timing charts indicate bus cycle length. After this bus cycle sometimes come read and write cycles in
succession.
Figure 8.8 Typical Bus Timings Using Software Wait (2)
Rev.2.41 Jan 10, 2006 Page 71 of 390
REJ09B0185-0241