M16C62P_06 Datasheet, PDF (85/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
8. Bus
(1) Separate Bus, No Wait Setting
BCLK
Write signal
Read signal
Data bus
Address bus
CS
(2) Separate Bus, 1-Wait Setting
BCLK
Write signal
Read signal
Data bus
Address bus
CS
(3) Separate Bus, 2-Wait Setting
BCLK
Write signal
Read signal
Data bus
Address bus
CS
Bus cycle ⁽¹⁾
Bus cycle ⁽¹⁾
Output
Address
Input
Address
Bus cycle ⁽¹⁾
Bus cycle ⁽¹⁾
Output
Address
Input
Address
Bus cycle ⁽¹⁾
Bus cycle ⁽¹⁾
Output
Address
Input
Address
NOTES :
1. These example timing charts indicate bus cycle length. After this bus cycle sometimes come read and write cycles in
succession.
Figure 8.7 Typical Bus Timings Using Software Wait (1)
Rev.2.41 Jan 10, 2006 Page 70 of 390
REJ09B0185-0241