M16C62P_06 Datasheet, PDF (406/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

REVISION HISTORY
M16C/62P Group (M16C/62P, M16C/62PT) Hardware Manual
Rev.
1.0
Date
Jan 31, 2003
Description
Page
Summary
1 Applications are partly revised.
2 Table 1.1.1 is partly revised.
5 Table 1.1.3 is partly revised.
Figure 1.1.2 is partly revised.
11 Explanation of “Memory” is partly revised.
20 Explanation of “Hardware Reset 1” is partly revised.
21 Figure 1.5.1 is partly revised.
22 Figure 1.5.2 is partly revised.
24 Figure 1.5.4 is partly revised.
25 VCR2 Register in Figure 1.5.6 is partly revised.
26 Figure 1.5.6 is partly revised.
27 Explanation of “Power Supply Down Detection Interrupt” is partly revised.
30 Figure 1.6.1 is partly revised.
31 Figure 1.6.2 is partly revised.
39 Table 1.7.5 is partly revised.
41 Table 1.7.7 is partly revised.
43 Figure 1.7.8 is partly revised.
44 Explanation of “4 Mbyte Mode” is partly revised.
53 Notes 12 and 13 in Figure 1.9.2 is partly revised.
54 Notes 2 and 5 in Figure 1.9.3 is partly revised.
55 Figure 1.9.4 is partly revised.
57 Note 4 in Figure 1.9.6 is partly revised.
60 Explanation of “PLL Clock” is partly revised.
61 Figure 1.9.9 is partly revised.
62 Explanation of “CPU Clock and BCLK” is partly revised.
63 Explanation of “Low-speed Mode” is partly revised.
Explanation of “Low Power Dissipation Mode” is partly revised.
64 Explanation of “Low Power Dissipation Mode” is partly revised.
Explanation of “On-chip Oscillator Low Power Dissipation Mode” is partly
revised.
Table 1.9.3 is partly revised.
65 Table 1.9.5 is partly revised.
68 Figure 1.9.10 is partly revised.
69 Figure 1.9.11 is partly revised.
70 Table 1.9.7 is added.
71 Explanation of “System Clock Protective Function” is partly revised.
77 Explanation of “Power Supply Down Detection Interrupt” is partly revised.
78 Table 1.11.1 is partly revised.
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