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| M16C62P_06 Datasheet, PDF (409/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES | |||
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REVISION HISTORY
M16C/62P Group (M16C/62P, M16C/62PT) Hardware Manual
Rev.
1.10
Date
May 28, 2003
Description
Page
Summary
271 Figure 1.27.7 is partly revised.
272 Explanation of âInterruptsâ is partly revised.
Explanation of âWriting in the User ROM Spaceâ is partly revised.
274 Table 1.27.4 is partly revised.
Explanation of âRead Array Commandâ is partly revised.
278 Explanation of âProgram Commandâ is partly revised.
287 Figure 1.27.15 is partly revised.
293 Partly revised.
2 Table 1.1.1 is partly revised.
4-5 Table 1.1.2 and 1.1.3 is partly revised.
14-19 SFR is partly revised.
Note 1 is partly revised.
20 Explanation of âHardware Reset 1â is partly revised.
23 Note 1 is added.
24 Figure 1.5.4 is partly revised.
Note 1 of Figure 1.5.5 is partly revised.
26 Figure 1.5.7 is partly revised.
27 Table 1.5.2 is partly revised.
Table 1.5.3 is partly revised.
Explanation of â1. Limitations on Stop Modeâ is partly revised.
28 Explanation of â1. Limitations on WAIT instructionâ is partly revised.
Figure 1.5.8 is partly revised.
31 Note is added.
33 Explanation of âMultiplexed Busâ is revised.
34 Explanation of â(2) Data Busâ is revised.
38 Explanation of â(7) Hold Signalâ is revised.
Note 3 of Table 1.7.4 is added.
39 Note 4 of Table 1.7.5 is added.
40 Explanation of â(10) Software Waitâ is revised.
41 Table 1.7.7 is revised.
46 Table of Figure 1.8.5 is revised.
47 Explanation is revised.
48-50 Figures 1.8.7 to 1.8.9 is partly revised.
51 Explanation of âClock Generation Circuitâ is revised.
52 Figure 1.9.1 is revised.
53 Note of Figure 1.9.2 is revised.
55 Note 12 is added.
58 Explanation of â(1) Main clockâ is partly revised.
60 Explanation of â(4) PLL Clockâ is partly revised.
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