M16C62P_06 Datasheet, PDF (137/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
12. Interrupt
12.9 Address Match Interrupt
An address match interrupt is generated immediately before executing the instruction at the address indicated by
the RMADi register (i=0 to 3). Set the start address of any instruction in the RMADi register. Use the AIER0 and
AIER1 bits in the AIER register and AIER20 and AIER21 bits in the AIER2 register to enable or disable the
interrupt. Note that the address match interrupt is unaffected by the I flag and IPL. For address match interrupts, the
value of the PC that is saved to the stack area varies depending on the instruction being executed (refer to 12.5.7
Saving Registers).
(The value of the PC that is saved to the stack area is not the correct return address.) Therefore, follow one of the
methods described below to return from the address match interrupt.
• Rewrite the content of the stack and then use the REIT instruction to return.
• Restore the stack to its previous state before the interrupt request was accepted by using the POP or similar
other instruction and then use a jump instruction to return.
Table 12.6 shows the Value of the PC that is Saved to the Stack Area when an Address Match Interrupt Request is
Accepted
Figure 12.13 shows the AIER, AIER2 and RMAD0 to RMAD3 Registers.
Table 12.6 Value of the PC that is Saved to the Stack Area when an Address Match Interrupt
Request is Accepted
Instruction at the Address Indicated by the RMADi Register
• 16-bit op-code instruction
• Instruction shown below among 8-bit operation code instructions
ADD.B:S #IMM8,dest SUB.B:S #IMM8,dest
AND.B:S
OR.B:S #IMM8,dest MOV.B:S #IMM8,dest
STZ.B:S
STNZ.B:S #IMM8,dest STZX.B:S #IMM81,#IMM82,dest
CMP.B:S #IMM8,dest PUSHM src
POPM dest
JMPS
#IMM8
JSRS
#IMM8
MOV.B:S #IMM,dest (However, dest=A0 or A1)
Instructions other than the above
#IMM8,dest
#IMM8,dest
Value of the PC that is
saved to the stack area
The address
indicated by the
RMADi register +2
The address
indicated by the
RMADi register +1
Value of the PC that is saved to the stack area : Refer to 12.5.7 Saving Registers.
Table 12.7 Relationship Between Address Match Interrupt Sources and Associated Registers
Address Match Interrupt sources
Address Match Interrupt 0
Address Match Interrupt 1
Address Match Interrupt 2
Address Match Interrupt 13
Address Match Interrupt Enable Bit
AIER0
AIER1
AIER20
AIER21
Address Match Interrupt Register
RMAD0
RMAD1
RMAD2
RMAD3
Rev.2.41 Jan 10, 2006 Page 122 of 390
REJ09B0185-0241