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M16C62P_06 Datasheet, PDF (138/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
M16C/62P Group (M16C/62P, M16C/62PT)
12. Interrupt
Address Match Interrupt Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
AIER
Address
0009h
After Reset
XXXXXX00b
Bit Symbol
Bit Name
Function
RW
Address Match Interrupt 0 0 : Interrupt disabled
AIER0 Enable Bit
1 : Interrupt enabled
RW
Address Match Interrupt 1 0 : Interrupt disabled
AIER1 Enable Bit
1 : Interrupt enabled
RW
—
Nothing is assigned. When w rite, set to “0”.
(b7-b2) When read, their contents are indeterminate.
—
Address Match Interrupt Enable Register 2
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
AIER2
Address
01BBh
After Reset
XXXXXX00b
Bit Symbol
Bit Name
Function
RW
Address Match Interrupt 2 0 : Interrupt disabled
AIER20 Enable Bit
1 : Interrupt enabled
RW
Address Match Interrupt 3 0 : Interrupt disabled
AIER21 Enable Bit
1 : Interrupt enabled
RW
—
Nothing is assigned. When w rite, set to “0”.
(b7-b2) When read, their contents are indeterminate.
—
Address Match Interrupt Register i (i = 0 to 3)
(b23)
(b19) (b16) (b15)
(b8)
b7
b3
b0 b7
b0 b7
b0
Symbol
RMAD0
RMAD1
RMAD2
RMAD3
Address
0012h to 0010h
0016h to 0014h
01BAh to 01B8h
01BEh to 01BCh
Function
Address setting register for address match interrupt
Nothing is assigned. When w rite, set to “0”.
When read, their contents are indeterminate.
After Reset
X00000h
X00000h
X00000h
X00000h
Setting Range RW
00000h to FFFFFh RW
—
Figure 12.13 AIER, AIER2 and RMAD0 to RMAD3 Registers
Rev.2.41 Jan 10, 2006 Page 123 of 390
REJ09B0185-0241