M16C62P_06 Datasheet, PDF (283/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
21. Programmable I/O Ports
Table 21.3 Unassigned Pin Handling in Memory Expansion Mode and Microprocessor Mode
Pin Name
Ports P0 to P7,
P8_0 to P8_4, P8_6 to P8_7,
P9 to P14
P4_5/CS1 to P4_7/CS3
BHE, ALE, HLDA, XOUT ⁽⁵⁾,
BCLK ⁽⁶⁾
HOLD, RDY
NMI (P8_5)
AVCC
AVSS, VREF
Connection
After setting for input mode, connect every pin to VSS via a resistor (pull-
down);
or after setting for output mode, leave these pins open. ^{(1, 2, 3, 4, 7)}
Connect to VCC2 via a resistor (pulled high) by setting the corresponding
direction bit in the PD4 register for CSi (i=1 to 3) to “0” (input mode) and
the CSi bit in the CSR register to “0” (chip select disabled).
Open
Connect via resistor to VCC2 (pull-up)
Connect via resistor to VCC1 (pull-up)
Connect to VCC1
Connect to VSS
NOTES:
1. When setting the port for output mode and leave it open, be aware that the port remains in input
mode until it is switched to output mode in a program after reset. For this reason, the voltage level
on the pin becomes indeterminate, causing the power supply current to increase while the port
remains in input mode.
Furthermore, by considering a possibility that the contents of the direction registers could be
changed by noise or noise-induced runaway, it is recommended that the contents of the direction
registers be periodically reset in software, for the increased reliability of the program.
2. Make sure the unused pins are processed with the shortest possible wiring from the microcomputer
pins (within 2 cm).
3. If the CNVSS pin has the VSS level applied to it, these pins are set for input ports until the processor
mode is switched over in a program after reset. For this reason, the voltage levels on these pins
become indeterminate, causing the power supply current to increase while they remain set for input
ports.
4. When the ports P7_0 and P7_1 are set for output mode, make sure a low-level signal is output from
the pins.
The ports P7_0 and P7_1 are N-channel open-drain outputs.
5. With external clock input to XIN pin.
6. If the PM07 bit in the PM0 register is set to “1” (BCLK not output), connect this pin to VCC2 via a
resistor (pulled high).
7. Process the port without a pin in the 100-pin version as follows.
•After reset, PU37 bit is “0” (P11 to P14 do not used).
Do not write “1” to PU37 bit. When read, value of PU37 bit is indeterminate.
•The port direction bit in the P11 to P14 can be set “0” or “1”.
Rev.2.41 Jan 10, 2006 Page 268 of 390
REJ09B0185-0241