M16C62P_06 Datasheet, PDF (123/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
12. Interrupt
12.3 Hardware Interrupts
Hardware interrupts are classified into two types − special interrupts and peripheral function interrupts.
12.3.1 Special Interrupts
Special interrupts are non-maskable interrupts.
12.3.1.1 NMI Interrupt
An NMI interrupt is generated when input on the NMI pin changes state from high to low. For details about the
NMI interrupt, refer to the 12.7 NMI Interrupt.
12.3.1.2 DBC Interrupt
Do not normally use this interrupt because it is provided exclusively for use by development tools.
12.3.1.3 Watchdog Timer Interrupt
Generated by the watchdog timer. Once a watchdog timer interrupt is generated, be sure to initialize the
watchdog timer. For details about the watchdog timer, refer to the 13. Watchdog Timer.
12.3.1.4 Oscillation Stop and Re-oscillation Detection Interrupt
Generated by the oscillation stop and re-oscillation detection function. For details about the oscillation stop and
re-oscillation detection function, refer to the 10. Clock Generation Circuit.
12.3.1.5 12.3.1.5 Low Voltage Detection Interrupt
Generated by the voltage detection circuit. For details about the voltage detection circuit, refer to the 6. Voltage
Detection Circuit.
12.3.1.6 Single-Step Interrupt
Do not normally use this interrupt because it is provided exclusively for use by development tools.
12.3.1.7 Address Match Interrupt
An address match interrupt is generated immediately before executing the instruction at the address indicated
by the RMAD0 to RMAD3 register that corresponds to one of the AIER0 or AIER1 bit in the AIER register or
the AIER20 or AIER21 bit in the AIER2 register which is “1” (address match interrupt enabled). For details
about the address match interrupt, refer to the 12.9 Address Match Interrupt.
12.3.2 Peripheral Function Interrupts
The peripheral function interrupt occurs when a request from the peripheral functions in the microcomputer is
acknowledged. The peripheral function interrupt is a maskable interrupt. See Table 12.2 Relocatable Vector
Tables about how the peripheral function interrupt occurs. Refer to the descriptions of each function for details.
Rev.2.41 Jan 10, 2006 Page 108 of 390
REJ09B0185-0241