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M16C62P_06 Datasheet, PDF (262/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
M16C/62P Group (M16C/62P, M16C/62PT)
18. A/D Converter
A/D Control Register 0 (1)
b7 b6 b5 b4 b3 b2 b1 b0
11
Symbol
Address
After Reset
ADCON0
03D6h
00000XXXb
Bit Symbol
Bit Name
Function
RW
CH0 Analog Input Pin Select Bit
Invalid in repeat sw eep mode 1
RW
CH1
RW
CH2
RW
A/D Operation Mode Select
MD0 Bit 0
b4 b3
1 1 : Repeat sw eep mode 0 or
RW
Repeat sw eep mode 1
MD1
RW
TRG
ADST
CKS0
Trigger Select Bit
A/D Conversion Start Flag
Frequency Select Bit 0
0 : Softw are trigger
_________
RW
1 : ADTRG trigger
0 : A/D conversion disabled
1 : A/D conversion started
RW
Refer to NOTE 3 for the ADCON2 Register
RW
NOTES :
1. If the ADCON0 register is rew ritten during A/D conversion, the conversion result w ill be indeterminate.
A/D Control Register 1 (1)
b7 b6 b5 b4 b3 b2 b1 b0
1
1
Symbol
Address
After Reset
ADCON1
03D7h
00h
Symbol
Address
After Reset
RW
A/D Sw eep Pin Select Bit (2)
When repeat sw eep mode 1 is selected
SCAN0
b1 b0
RW
0 0 : AN0 (1 pins)
0 1 : AN0, AN1 (2 pins)
SCAN1
1 0 : AN0 to AN2 (3 pins)
RW
1 1 : AN0 to AN3 (4 pins)
A/D Operation Mode Select Bit 1 Set to “1” w hen repeat sw eep mode 1 is
MD2
selected
RW
8/10-Bit Mode Select Bit
0 : 8-bit mode
BITS
1 : 10-bit mode
RW
CKS1
VCUT
Frequency Select Bit 1
Vref Connect Bit (3)
Refer to NOTE 3 for the ADCON2 Register RW
1 : Vref connected
RW
OPA0
External Op-Amp Connection
Mode Bit
b7 b6
0 0 : ANEX0 and ANEX1 are not used
RW
0 1 : Do not set to this value
OPA1
1 0 : Do not set to this value
RW
1 1 : External op-amp connection mode
NOTES :
1. If the ADCON1 register is rew ritten during A/D conversion, the conversion result w ill be indeterminate.
2. AN0_0 to AN0_7, and AN2_0 to AN2_7 can be used in the same w ay as AN0 to AN7. Use the ADGSEL1 to
ADGSEL0 bits in the ADCON2 register to select the desired pin. How ever, if VCC2 < VCC1, do not use AN0_0 to
AN0_7 and AN2_0 to AN2_7 as analog input pins.
3. If the VCUT bit is reset from “0” (Vref unconnected) to “1” (Vref connected), w ait for 1 µs or more before starting
A/D conversion.
Figure 18.9 ADCON0 Register and ADCON1 Register (Repeat Sweep Mode 1)
Rev.2.41 Jan 10, 2006 Page 247 of 390
REJ09B0185-0241