M16C62P_06 Datasheet, PDF (118/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
10. Clock Generation Circuit
10.6 Oscillation Stop and Re-oscillation Detect Function
The oscillation stop and re-oscillation detect function is such that main clock oscillation circuit stop and re-
oscillation are detected. At oscillation stop, re-oscillation detection, reset or oscillation stop, re-oscillation
detection interrupt are generated. Which is to be generated can be selected using the CM27 bit in the CM2 register.
The oscillation stop detection function can be enabled and disabled by the CM20 bit in the CM2 register. Table
10.9 lists a Specification Overview of Oscillation Stop and Re-Oscillation Detect Function.
Table 10.9 Specification Overview of Oscillation Stop and Re-Oscillation Detect Function
Item
Specification
Oscillation Stop Detectable Clock and
Frequency Bandwidth
f(XIN)≥2 MHz
Enabling Condition for Oscillation Stop,
Re-Oscillation Detection Function
Set CM20 bit to “1” (enable)
Operation at Oscillation Stop,
Re-Oscillation Detection
• Reset occurs (when CM27 bit =0)
• Oscillation stop, re-oscillation detection interrupt
generated (when CM27 bit =1)
10.6.1 Operation When CM27 bit = 0 (Oscillation Stop Detection Reset)
Where main clock stop is detected when the CM20 bit is “1” (oscillation stop, re-oscillation detection function
enabled), the microcomputer is initialized, coming to a halt (oscillation stop reset; refer to 4. Special Function
Register (SFR), 5. Reset).
This status is reset with hardware reset 1 or hardware reset 2. Also, even when re-oscillation is detected, the
microcomputer can be initialized and stopped; it is, however, necessary to avoid such usage (During main clock
stop, do not set the CM20 bit to “1” and the CM27 bit to “0”).
10.6.2 Operation When CM27 bit = 0 (Oscillation Stop and Re-oscillation Detect
Interrupt)
Where the main clock corresponds to the CPU clock source and the CM20 bit is “1” (oscillation stop and re-
oscillation detect function enabled), the system is placed in the following state if the main clock comes to a halt:
• Oscillation stop and re-oscillation detect interrupt request occurs.
• The on-chip oscillator starts oscillation, and the on-chip oscillator clock becomes the clock source
for CPU clock and peripheral functions in place of the main clock.
• CM21 bit = 1 (on-chip oscillator clock for CPU clock source and clock source of peripheral function.)
• CM22 bit = 1 (main clock stop detected)
• CM23 bit = 1 (main clock stopped)
Where the PLL clock corresponds to the CPU clock source and the CM20 bit is “1,” the system is placed in the
following state if the main clock comes to a halt: Since the CM21 bit remains unchanged, set it to “1” (on-chip
oscillator clock) inside the interrupt routine.
• Oscillation stop and re-oscillation detect interrupt request occurs.
• CM22 bit = 1 (main clock stop detected)
• CM23 bit = 1 (main clock stopped)
• CM21 bit remains unchanged
Where the CM20 bit is “1”, the system is placed in the following state if the main clock re-oscillates from the
stop condition:
• Oscillation stop and re-oscillation detect interrupt request occurs.
• CM22 bit = 1 (main clock re-oscillation detected)
• CM23 bit = 0 (main clock oscillation)
• CM21 bit remains unchanged
Rev.2.41 Jan 10, 2006 Page 103 of 390
REJ09B0185-0241