M16C62P_06 Datasheet, PDF (182/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
16. Three-Phase Motor Control Timer Function
Three-Phase Control Register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
INVC0
Address
0348h
After Reset
00h
Bit Symbol
Bit Name
Function
RW
Interrupt Enable Output
0 : The ICTB2 counter is incremented by one on the
INV00 ^{Polarity Select Bit (3)}
rising edge of Timer A1 reload control signal
1 : The ICTB2 counter is incremented by one on the
RW
f alling edge of Timer A1 reload control signal
INV01
INV02
Interrupt Enable Output
Specification Bit ^{(2, 3)}
Mode Select Bit ^{(4, 5)}
0 : ICTB2 counter is incremented by one when Timer B2
underf lows
RW
1 : Selected by the INV00 bit
0 : No three-phase control timer functions
1 : Three-phase control timer function
RW
Output Control Bit ^{(5, 6)}
0 : Disables three-phase control timer output
INV03
1 : Enables three-phase control timer output
RW
Positiv e and Negativ e-Phases 0 : Enables concurrent active output
INV04 Concurrent Activ e Disable
1 : Disables concurrent active output
RW
Function Enable Bit
Positiv e and Negativ e-Phases 0 : Not detected
INV05 Concurrent Activ e Output Detect _{1 : Detected}
RW
Flag ⁽⁷⁾
Modulation Mode
0 : Triangular w ave modulation mode
INV06 _{Select (8, 9)}
1 : Saw tooth w ave modulation mode
RW
Softw are Trigger Select
INV07
Transf er trigger is generated when the INV07 bit is set to “1”.
Trigger to the dead time timer is also generated when setting _RW
the INV06 bit to “1”. Its v alue is “0” when read.
NOTES :
1. Set the INVC0 register af ter the PRC1 bit in the PRCR register is set to “1” (write enable).
Rewrite the INV00 to INV02 and INV06 bits when Timers A1, A2, A4 and B2 stop.
2. Set the INV01 bit to “1” af ter setting the ICTB2 register.
3. The INV00 and INV01 bits are enabled only when the INV11 bit is set to “1” (three-phase mode 1). The ICTB2 counter is incremented by
one ev ery time Timer B2 underf lows, regardless of INV00 and INV01 bit settings, when the INV11 bit is set to “0” (three-phase mode).
When setting the INV01 bit to “1”, set Timer A1 count start f lag bef ore the f irst Timer B2 underf low.
When the INV00 bit is set to “1”, the f irst interrupt is generated when Timer B2 underf lows n -1 times, if n is the v alue set in the ICTB2
counter. Subsequent interrupts are generated ev ery n times Timer B2 underf lows.
4. Set the INV02 bit to “1” to operate the dead time timer, U-, V-and W-phase output control circuits and ICTB2 counter.
5. When t_{_}h_{_}e INV_{__}C03 bit is_{__}s_{_}et to “1”, the pins applied to U/V/W output three-phase PWM.
The U, U, V, V, W and W pins, including pins shared with other output f unctions, are all placed in high-impedance states
when the f ollowing conditions are all met.
• The INV02 bit is set to “1” (three-phase control timer f unction)
• The INV03 bit is set to “0” (three-phase control timer output disabled)
• Direction registers of each port are set to “0” (input mode)
6. The INV03 bit is set to “0” when the f ollowings conditions are all met.
• Reset
• A concurrent activ e state occurs while INV04 bit is set to “1”
• The INV03 bit is set to _{_}“_{_}0_{_}”_{_}b_{_}y program
• A signal applied to the NMI pin changes “H” to “L”
When both the INVC04 and INVC05 bits are set to “1”, the INVC03 bit is set to “0”.
7. The INV05 bit can not be set to “1” by program. Set the INV04 bit to “0”, as well, when setting the INV05 bit to “0”.
8. The f ollowing table describes how the INV06 bit works.
Item
INV06=0
INV06=1
Mode
Triangular wav e modulation mode
Sawtooth wav e modulation mode
Timing to Transf er f rom the IDB0 Transf erred once by generating a transf er trigger
and IDB1 Registers to Three Phase af ter setting the IDB0 and IDB1 registers
Output Shif t Register
Transf erred ev ery time a transf er trigger
is generated
Timing to Trigger the Dead Time
Timer when the INV16 Bit=0
On the f alling edge of a one-shot pulse of the timer By a transf er trigger, or the f alling edge of
A1, A2 or A4
a one-shot pulse of the timer A1, A2 or A4
INV13 Bit
Enabled when the INV11 bit=1 and the INV06 bit=0 Disabled
Transf er trigger : Timer B2 underf lows and write to the INV07 bit, or write to the TB2 register when INV10 = 1
9. When the INV06 bit is set to “1”, set the INV11 bit to “0” (three-phase mode 0) and the PWCON bit in the TB2SC register to “0” (reload
Timer B2 with Timer B2 underf low).
Figure 16.2 INVC0 Register
Rev.2.41 Jan 10, 2006 Page 167 of 390
REJ09B0185-0241