M16C62P_06 Datasheet, PDF (329/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
23. Electrical Characteristics
VCC1=VCC2=5V
Timing Requirements
(VCC1 = VCC2 = 5V, VSS = 0V, at Topr = −20 to 85°C / −40 to 85°C unless otherwise specified)
Table 23.13 External Clock Input (XIN input) ⁽¹⁾
Symbol
Parameter
tc
External Clock Input Cycle Time
tw(H)
External Clock Input HIGH Pulse Width
tw(L)
External Clock Input LOW Pulse Width
tr
External Clock Rise Time
tf
External Clock Fall Time
NOTES:
1. The condition is VCC1=VCC2=3.0 to 5.0V.
Standard
Unit
Min.
Max.
62.5
ns
25
ns
25
ns
15
ns
15
ns
Table 23.14 Memory Expansion Mode and Microprocessor Mode
Symbol
Parameter
tac1(RD-DB) Data Input Access Time (for setting with no wait)
tac2(RD-DB) Data Input Access Time (for setting with wait)
tac3(RD-DB) Data Input Access Time (when accessing multiplex bus area)
tsu(DB-RD)
Data Input Setup Time
tsu(RDY-BCLK) RDY Input Setup Time
tsu(HOLD-BCLK) HOLD Input Setup Time
th(RD-DB)
Data Input Hold Time
th(BCLK-RDY) RDY Input Hold Time
th(BCLK-HOLD) HOLD Input Hold Time
Standard
Unit
Min.
Max.
(NOTE 1)
ns
(NOTE 2)
ns
(NOTE 3)
ns
40
ns
30
ns
40
ns
0
ns
0
ns
0
ns
NOTES:
1. Calculated according to the BCLK frequency as follows:
f-0--(^{--.B-5---C-x----1L---0-K--9---}) ^{– 45[ns]}
2. Calculated according to the BCLK frequency as follows:
-⁽--n----f-^–-₍---B0----.C-5----L⁾---^x-K--1--₎--0---9-- – 45[ns]
n is ”2” for 1-wait setting, “3” for 2-wait setting and “4” for 3-wait setting.
3. Calculated according to the BCLK frequency as follows:
-⁽--n----f-^–-₍---B0----.C-5----L⁾--^x--K--1--₎--0---9-- – 45[ns]
n is “2” for 2-wait setting, “3” for 3-wait setting.
Rev.2.41 Jan 10, 2006 Page 314 of 390
REJ09B0185-0241