M16C62P_06 Datasheet, PDF (249/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
18. A/D Converter
fAD
ADTRG
VREF
AVSS
0 ^CKS2
1/3 ¹
TRG
Software trigger ⁰
1
A/D conversion rate selection
CKS1
1
1
0
1/2
1/2
0
CKS
A/D trigger
0
1
VCUT
Resistor ladder
Successive conversion register _{ADCON1 register}
φAD
ADCON0 register
AD0 register (16)
AD1 register (16)
AD2 register (16)
AD3 register (16)
AD4 register (16)
AD5 register (16)
AD6 register (16)
AD7 register (16)
Decoder
for A/D register
Data bus high-order
PM00
(1)
PM01
Port P0 group
AN0_0
AN0_1
AN0_2
AN0_3
AN0_4
AN0_5
AN0_6
AN0_7
Port P2 group
AN2_0
AN2_1
AN2_2
AN2_3
AN2_4
AN2_5
AN2_6
AN2_7
Data bus low-order
ADCON2 register
CH2 to CH0
=000b
=001b
=010b
=011b
=100b
=101b
=110b
=111b
CH2 to CH0
=000b
=001b
=010b
=011b
=100b
=101b
=110b
=111b
Port P10 group
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
CH2 to CH0
=000b
=001b
=010b
=011b
=100b
=101b
=110b
=111b
ADGSEL1 to ADGSEL0=00b
OPA1 to OPA0=11b
PM01 to PM00=00b
ADGSEL1 to ADGSEL0=10b
OPA1 to OPA0=11b
Decoder
for channel
selection
Vref
VIN ^Comparator
ADGSEL1 to ADGSEL0=00b
OPA1 to OPA0=00b
PM01 to PM00=00b
ADGSEL1 to ADGSEL0=10b
OPA1 to OPA0=00b
PM01 to PM00=00b
ADGSEL1 to ADGSEL0=11b
OPA1 to OPA0=00b
ANEX0
ANEX1
PM01 to PM00=00b
ADGSEL1 to ADGSEL0=11b
OPA1 to OPA0=11b
OPA0=1
OPA1=1
OPA1 to OPA0
=01b
OPA1=1
NOTES :
1. Port P0 group (AN0_0 to AN0_7) can be used as analog input pins even when PM01 to PM00 bits
are set to “01b” (memory expansion mode) and PM05 to PM04 bits are set to “11b” (multiplex bus
allocated to the entire CS space).
Figure 18.1 A/D Converter Block Diagram
Rev.2.41 Jan 10, 2006 Page 234 of 390
REJ09B0185-0241