M16C62P_06 Datasheet, PDF (399/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
25. Differences Depending on Manufacturing Period
Table 25.2 Technical Update Applicable Table of M16C/62P Flash and ROM External Versions (2)
Precaution
Chip Version
ABC
TECHNICAL UPDATE
When supplying power to the microcomputer, the power supply
voltage applied to the VCC1 pin must meet the conditions of
÷ - - TN-M16C-116-0311
SVCC.
Do not set the CM10 bit in the CM1 register to 1 (stop mode) with
setting the VC13 bit in the VCR1 register to 1 (VCC1≥Vdet 4)
when a low voltage detection interrupt in the voltage detection
circuit is used under the following settings:
• the VC27 bit in the VCR2 register to 1 (low voltage detection
circuit enabled)
÷ - - ^{TN-M16C-107-0309}
Precaution 1.1
• the D40 bit in the D4INT register to 1 (low voltage detection
interrupt enabled)
• the D41 bit to 1 (use low voltage detection interrupt to exit stop
mode)
Do not generate the NMI interrupt after setting the CM10 bit in the _{÷ - -} ^{TN-M16C-107-0309}
CM1 register to “1” (stop mode) and entering stop mode.
Precaution 1.2
Do not set the CM10 bit in the CM1 register to “1” (stop mode)
when the microcomputer is in low-speed mode under the
following settings:
• the CM04 bit in the CM0 register is set to “1” (sub clock
÷ - - ^{TN-M16C-107-0309}
Precaution 1.3
oscillation)
• the CM07 bit in the CM0 register is set to “1” (sub clock)
When using the sub clock (XCIN-XCOUT) as the CPU clock
(BCLK) or as the timer count source, DO NOT leave the CM03 ÷ ÷ - TN-M16C-119A/EA
bit set to “1” (XCINXCOUT drive capacity “HIGH” ).
√ : Applies
− : Dose not apply
Rev.2.41 Jan 10, 2006 Page 384 of 390
REJ09B0185-0241