M16C62P_06 Datasheet, PDF (181/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
16. Three-Phase Motor Control Timer Function
INV00 to INV07: Bits in INVC0 Register
INV10 to INV15: Bits in INVC1 Register
DUi, DUBi: Bits in IDBi Register (i=0,1)
TA1S to TA4S: Bits in TABSR Register
PWCOM: Bits in TB2SC Register
INV00
Reload Control Signal for Timer A1
INV01
INV11
INV13
ICTB2 Register n=1 to 15
Value to be written to ^INV03
DQ
INV03 bit
Circuit to set Interrupt
Generation Frequency
1
0
PWCON
ICTB2 Counter
n=1 to 15
Write signal to INV03 bit T
RESET
Timer B2
NMI
Interrupt _INV05
Request Bit
R
INV02
Timer B2 Underflow
Timer B2
(Timer Mode)
Write Signal to
Timer B2
INV10
f1 or f2
0
1/2 ₁
INV12
INV07
Start Trigger Signal for Timers A1, A2, A4
TA4 Register TA41 Register
Reload
Reload Control
Signal for Timer A4
Trigger
Timer A4 Counter
(One-Shot Timer Mode)
INV11
TQ
Timer A4
One-Shot
Pulse
When setting the TA4S bit to “0”,
signal is set to “0”
INV06
Reload Register
n = 1 to 255
Trigger
INV04
Transfer Trigger⁽¹⁾
Dead Time
Trigger
Timer
DQ
n = 1 to 255
T
U-phase Output
Control Circuit
DU1 DU0
bit
bit
DQ DQ
T
T
DUB1 DUB0
bit
bit
U-Phase
Output Signal
Three-Phase
Output
Shift Register
(U Phase)
DQ DQ
T
T
DQ
U-Phase
T
Output Signal
TA1 Register TA11 Register
Reload
Reload Control
Signal for Timer A1
Trigger
Timer A1 Counter
(One-Shot Timer Mode)
INV11
TQ
Timer A1
One-Shot
Pulse
When setting the TA1S bit to “0”,
signal is set to “0”
TA2 Register TA21 Register
Reload
Reload Control
Signal for Timer A2
Trigger
Timer A2 Counter
(One-Shot Timer Mode)
INV11
TQ
Timer A2
One-Shot
Pulse
When setting the TA1S bit to “0”,
signal is set to “0”
INV06
Trigger
Trigger
Dead Time
Timer
n = 1 to 255
V-Phase Output
Control Circuit
DQ
V-Phase
T
Output Signal
DQ
V-Phase
T
Output Signal
INV06
Trigger
Trigger
Dead Time
Timer
n = 1 to 255
W-Phase Output
Control Circuit
DQ
W-Phase
T
Output Signal
DQ
W-Phase
T
Output Signal
INV14
Inverse
Control
U
Inverse
Control
U
Inverse
V
Control
Inverse
Control
V
Inverse
Control
W
Inverse
Control
W
Switching to P8_0, P8_1 and P7_2 to P7_5 is not shown in this diagram.
NOTES:
1. Transfer trigger is generated only when the IDB0 and IDB1 registers are set and the first timer B2 underflows,
if the INV06 bit is set to “0” (triangular wave modulation).
Figure 16.1 Three-phase Motor Control Timer Functions Block Diagram
Rev.2.41 Jan 10, 2006 Page 166 of 390
REJ09B0185-0241