M16C62P_06 Datasheet, PDF (180/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
16. Three-Phase Motor Control Timer Function
16. Three-Phase Motor Control Timer Function
Note
The M16C/62P (80-pin version) and M16C/62PT (80-pin version) do not use this function.
Timers A1, A2, A4 and B2 can be used to output three-phase motor drive waveforms. Table 16.1 lists the Three-phase
Motor Control Timer Functions Specifications. Figure 16.1 shows the Three-phase Motor Control Timer Functions
Block Diagram. Also, the related registers are shown on Figure 16.2 to Figure 16.8.
Table 16.1 Three-phase Motor Control Timer Functions Specifications
Item
Specification
Three-Phase Waveform Output Pin _{Six pins (U, U, V, V, W, W)}
Forced Cutoff Input(1)
Used Timers
Output Waveform
Carrier Wave Cycle
Three-Phase PWM Output Width
Dead Time
Active Level
Positive and Negative-Phase
Concurrent Active Disable Function
Interrupt Frequency
Input “L” to NMI pin
Timer A4, A1, A2 (used in the one-shot timer mode)
Timer A4: U- and U-phase waveform control
Timer A1: V- and V-phase waveform control
Timer A2: W- and W-phase waveform control
Timer B2 (used in the timer mode)
Carrier wave cycle control
Dead time timer (3 eight-bit timer and shared reload register)
Dead time control
Triangular wave modulation, Sawtooth wave modification
Enable to output “H” or “L” for one cycle
Enable to set positive-phase level and negative-phase level
respectively
Triangular wave modulation: count source x (m+1) x 2
Sawtooth wave modulation: count source x (m+1)
m: Setting value of TB2 register, 0000h to FFFFh
Count source: f1, f2, f8, f32, fC32
Triangular wave modulation: count source x n x 2
Sawtooth wave modulation: count source x n
n: Setting value of TA4, TA1 and TA2 register (of TA4, TA41,
TA1, TA11, TA2 and TA21 registers when setting the INV11 bit
to “1”), 0001h to FFFFh
Count source: f1, f2, f8, f32, fC32
Count source x p, or no dead time
p: Setting value of DTT register, 01h to FFh
Count source: f1, f2, f1 divided by 2, f2 divided by 2
Enable to select “H” or “L”
Positive and negative-phases concurrent active disable function
Positive and negative-phases concurrent active detect function
For Timer B2 interrupt, select a carrier wave cycle-to-cycle basis
through 15 times carrier wave cycle-to-cycle basis
NOTES:
1. Forced cutoff with NMI input is effective when the IVPCR1 bit in the TB2SC register is set to “1”
(three-phase output forcible cutoff by NMI input enabled). If an “L” signal is applied to the NMI pin
when the IVPCR1 bit is “1,” the related pins go to a high-impedance state regardless of which
functions of those pins are being used.
Related pins
P7_2/CLK2/TA1OUT/V, P7_3/CTS2/RTS2/TA1IN/V, P7_4/TA2OUT/W,
P7_5/TA2IN/W, P8_0/TA4OUT/U, P8_1/TA4IN/U
Rev.2.41 Jan 10, 2006 Page 165 of 390
REJ09B0185-0241