M16C62P_06 Datasheet, PDF (76/421 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

M16C/62P Group (M16C/62P, M16C/62PT)
8. Bus
Chip Select Control Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
Address
After Reset
CSR
0008h
00000001b
Bit Symbol
Bit Name
____
CS0 Output Enable Bit
CS0
____
CS1 ^{CS1 Output Enable Bit}
Function
RW
0 : Chip select output disabled
(functions as I/O port)
RW
1 : Chip select output enabled
RW
____
CS2 Output Enable Bit
CS2
RW
____
CS3 Output Enable Bit
CS3
RW
CS0W
CS1W
____
CS0 Wait Bit
____
CS1 Wait Bit
0 : With w ait state
1 : Without w ait state ^{(1, 2, 3)}
RW
RW
____
CS2 Wait Bit
CS2W
RW
____
CS3 Wait Bit
CS3W
RW
NOTES :
_____
____
1. Where the RDY signal is used in the area indicated by CSi (i = 0 to 3) or the multiplex bus is used, set the CSiW bit to
(w ith w ait state).
2. If the PM17 bit in the PM1 register is set to “1” (w ith w ait state), set the CSiW bit to “0” (w ith w ait state).
3. When the CSiW bit = 0 (w ith w ait state), the number of w ait states can be selected using the CSEi1W to CSEi0W bits
in the CSE register.
Figure 8.1 CSR Register
Rev.2.41 Jan 10, 2006 Page 61 of 390
REJ09B0185-0241